Ferroelectric memory is known as a conventional non-volatile memory. For example, Japanese Unexamined Patent Publication No. 1996-227980 (in particular, FIG. 9) discloses a structure in which a ferroelectric material is used as a material for a capacitor insulating film of a DRAM (Dynamic Random Access read write Memory). This ferroelectric memory is fabricated by attaching a substrate on which a capacitor is formed and a substrate on which a switching element is formed into a united body.
Specifically, as shown in FIG. 9(a) attached with the present specification, a transistor Tr is formed on a silicon substrate 61, and a first substrate S1 is then formed to which a titanium nitride film 63 exposed to the surface is connected to an n− type region 62.
As also shown in FIG. 9(a), by forming a BSTO (Ba0.5Sr0.5TiO3) film 65 on a monocrystalline Nb-doped STO (SrTiO3) substrate 64 and a platinum film 66 on the BSTO film 65, a second substrate S2 comprising a capacitor C is obtained.
The thus obtained first substrate S1 and second substrate S2 are joined to each other and made thinner until the thickness thereof reaches a predetermined value, an isolation region 67 as shown in FIG. 9(b) is then formed, obtaining a DRAM memory cell. The isolation region 67 is composed of a first isolation region 67a that separates adjacent transistors Tr in the first substrate S1 from each other and a second isolation region 67b that separates adjacent capacitors C in the second substrate S2 to each other.
An equivalent circuit comprising such memory cells arranged in a matrix is shown in FIG. 10. As shown in FIG. 10, a gate of each switching element Tr is connected to a word line WL, and a drain of each switching element Tr is connected to a bit line BL. A source of each switching element Tr is connected to one of the electrodes of each capacitor C and a plate wire PL is connected to the other electrode of each capacitor C. Writing to each memory cell is conducted by applying voltage to either the bit line BL or plate wire PL while the word line WL is in an ON-state, and the data is read by detecting inversion of polarization of the ferroelectric while applying voltage to the capacitor C.
In the above-described conventional method for fabricating a semiconductor memory, it is possible to reduce the level of accuracy necessary for joining the first substrate S1 having a switching element Tr to the second substrate S2 having a capacitor C. However, in a ferroelectric memory having a structure as shown in FIG. 9(a), in addition to forming the first isolation region 67a in the first substrate S1 comprising the switching element Tr, it is necessary to form the second isolation region 67b in the second substrate S2 comprising the ferroelectric capacitor C. Therefore, in a conventional technique, as shown in FIG. 9(b), after attaching the first substrate S1 to the second substrate S2, the isolation region 67 is formed, i.e., the first isolation region 67a and the second isolation region 67b are formed at the same time. However, even in such a fabrication method, a complicated fine processing step employing photolithography is still necessary for the second substrate S2. This problem has become more significant as the degree of integration has increased.
Furthermore, in the above-described method for fabricating a semiconductor memory, it is necessary to construct the memory so that the voltage applied from the plate wire PL to the capacitor C shown in FIG. 10 can be controlled; however, a concrete structure for meeting this requirement has not been disclosed and there is a room for further improvement in terms of ease of fabrication.
As well as ferroelectric memories, a memory using the characteristic that the resistance value of a bulk changes depending on the condition of crystalline (so-called a phase-change memory) is known as a non-volatile memory. For example, Japanese Unexamined Patent Publication No. 1999-204742, U.S. Pat. No. 6,314,014, etc., disclose such memories; however, none of these publications discloses a means for solving the above problem.